Improvements in spad-based photodetectors

ABSTRACT

An integrated photodetecting optoelectronic semiconductor component configured to deliver an output signal indicative of the intensity of light irradiating the component. The component may include a SPAD-based main detection device configured to detect incoming photons and to deliver an output signal based on the detected photons. The component may also include a SPAD-based reference detection device proximate to the main detection device where the reference detection device has the same electro-optical behaviour as the main detection device, is configured to detect incoming photons, configured to deliver a reference signal based on the detected photons, and has a light inlet for incoming photons. The component may also include a neutral density filtering device and a controller configured to determine a nominal output signal, compare the nominal output signal with the output signal delivered by the main detection device, and adjust an operating parameter based on the comparison.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a national stage entry according to 35 U.S.C.§ 371 of PCT application No.: PCT/EP2021/052817 filed on Feb. 5, 2021;which claims priority to German patent application DE 10 2020 201 452.3,filed on Feb. 6, 2020; all of which are incorporated herein by referencein their entirety and for all purposes.

TECHNICAL FIELD

The present disclosure pertains to an integrated photodetectingoptoelectronic semiconductor component and further relates to anavalanche photodiode for light detection.

BACKGROUND

Such a SPAD-based optoelectronic component is known from the article“185 MHz Count Rate, 139 dB Dynamic Range Single-Photon Avalanche Diodewith Active Quenching Circuit in 130 nm CMOS Technology” by A. Eisele etal., which was presented at the International Image Sensor Workshop inJapan on 14/06/11 (pp. 278-281 of the conference proceedings). In thefollowing, this article will be simply referred to as the “Eiselearticle”.

The Eisele article focuses on the saturation problem that one encounterswhen operating Single-Photon Avalanche Diodes (or SPADs) under highlight intensity conditions. Above a certain light intensity, SPADs areoverwhelmed by the high rate of incoming photons. Under theseconditions, a SPAD will fail to detect a relevant fraction of theimpinging photons. The signal delivered by the SPAD saturates and is nolonger an accurate measure of the light intensity.

To mitigate this problem, the Eisele article presents an improved activequenching circuit. This compact active quenching circuit reduces thedead time of the SPADs. Accordingly, the SPADs' saturation threshold ishigher and they can be used for measurements at higher lightintensities.

The solution presented by the Eisele article is however complicated andcostly. Photodetectors built on this solution include complex activequenching circuits and are thus difficult and expensive to mass-produce.

A different approach to mitigating the saturation problem in SPADsrelies on detailed algorithms and post-processing analysis. The approachuses a theoretical model of a SPAD's saturation curve to predict theSPAD's behaviour under saturation conditions. The model is used tocorrect the output signal provided by the saturated SPAD.

This analytical approach is however quite complex and difficult toimplement because a SPAD's saturation curve depends on many factors, andin particular on the illumination conditions, which vary from oneapplication to the next.

In view of the above, it is an objective of the present disclosure toprovide a SPAD-based photodetecting optoelectronic component, which canreliably operate even under high light intensity conditions.

In an embodiment, the component should also be of a simple design andeasy to mass-produce.

A further objective is to provide a SPAD-based photodetectingoptoelectronic component, which can adapt to widely differentillumination conditions to always provide an accurate measurementsignal, irrespective of the specific application.

Such an avalanche photodiode is disclosed in the article entitled “Afirst single-photon avalanche diode fabricated in standard SOI CMOStechnology with a full characterization of the device” by M. J. Lee etal, published in Optics Express, 18 May 2015, Vol. 23, No. 10, pp.13200-13209. In the following, this article will be called the Leearticle.

A first problem with avalanche photodiodes is the risk of premature edgebreakdown at the edges of the avalanche region, which is due to the highelectric field that needs to be maintained in the avalanche region.

A second problem arises when individual avalanche photodiodes arecombined into a whole photodetecting array. Adjacent photodiodes in thearray tend to suffer from optical and electrical crosstalk, whichgenerates noise in the array's output signal.

In order to address the first problem, the single-photon avalanche diode(SPAD) design known from the Lee article includes a p-well guard ringand a shallow trench isolation, cf. FIG. 1 . In order to address thesecond problem, the SPAD includes a lateral medium trench isolation,which prevents electrical crosstalk between adjacent SPADs.

US 2015/0325737 A1 shows a different SPAD design (cf. FIG. 1 ), whichalso includes one structure for preventing edge breakdown and anotherstructure for preventing crosstalk. In this design, edge breakdown isprevented via a p-well guard ring 24. Crosstalk protection isimplemented in the form of a lateral insulation region 30 having achannel stopper region 32 and a metal region 34. The metal region 34ensures the optical isolation from adjacent SPADs, and the channelstopper region 32 provides electrical insulation from adjacent SPADs.

The crosstalk and edge breakdown prevention structures present in theabove-described designs complicate the layout and manufacturing of theavalanche photodiode. They also increase the photodiode's size andreduce its fill factor.

An object of the present disclosure is therefore to provide an avalanchephotodiode, which includes a simple and space-saving way of preventingedge breakdown and of reducing crosstalk.

SUMMARY

According to the present disclosure, the above objectives are achievedwith the initially-defined optoelectronic component, which ischaracterised by a SPAD-based reference detection device proximate tothe main detection device, having the same electro-optical behaviour asthe main detection device, configured to detect incoming photons and todeliver at least one reference signal based on the detected photons, andhaving a light inlet for incoming photons, by a neutral densityfiltering device covering the light inlet of the reference detectiondevice, and by a controller configured to determine a nominal outputsignal based on the at least one reference signal delivered by thereference detection device and on a known optical property of theneutral density filtering device, to compare the nominal output signalwith the output signal delivered by the main detection device, and, ifthe output signal is different from the nominal output signal, to adjustat least one operating parameter of the main detection device and of thereference detection device.

Thanks to the filter-covered reference detection device, theoptoelectronic component of the present disclosure includes one or moreSPADs, which will always operate in their linear detection range (i.e.below saturation), even under conditions of high light intensity. Basedon the known attenuating properties of the filtering device, theassociated controller can infer an expected nominal output signal fromthe reference signal delivered by the reference detection device. If theoutput signal of the main detection device does not correspond to thecalculated nominal output signal, the controller concludes that the oneor more SPADs of the main detection device are saturated. In this case,the controller then adjusts at least one operating parameter of thecomponent to bring the SPAD(s) of the main detection device belowsaturation.

The optoelectronic component of the present disclosure can thus detect ahigh light intensity condition in real time and automatically adaptthereto. This ensures a reliable operation, even under bright light.

The solution of the present disclosure is particularly simple and lendsitself easily to mass-production. Indeed, the additional elements neededfor the real-time saturation correction can be implemented as standardand basic optical and electronic elements (conventional SPADs,conventional neutral density filters, basic controllers).

According to embodiments, the optoelectronic component of the presentdisclosure may include one, several or all of the following features, inall technically possible combinations:

-   -   the controller is configured to adjust the at least one        operating parameter only if the output signal is smaller than        the nominal output signal;    -   the controller adjusts, and in particular reduces the magnitude        of the reverse-bias voltage applied to each SPAD of the main        detection device and of the reference detection device;    -   the same electro-optical behaviour in the main detection device        and the reference detection device is achieved in that the same        SPAD structure is implemented in both devices;    -   the known optical property is the fractional transmittance T of        the neutral density filtering device;    -   the reference detection device is configured to deliver a single        reference signal, and the neutral density filtering device        consists of a single neutral density filter, and the controller        calculates the nominal output signal using the following        formula: Sn=Sr/T;    -   both the main detection device and the reference detection        device each comprise a single SPAD to detect incoming photons, a        recess, the SPAD being arranged at the bottom of the recess, and        readout electronics for processing the SPAD signal delivered by        the SPAD;    -   both the main detection device and the reference detection        device are integrated into a single semiconductor package;    -   a SPAD array, a first portion of the SPAD array being part of        the main detection device, and the remaining portion of the SPAD        array being part of the reference detection device;    -   the neutral density filtering device consists of a single        neutral density filter covering the remaining portion of the        SPAD array;    -   the neutral density filtering device consists of at least two        separate neutral density filters covering the remaining portion        of the SPAD array;    -   the filters have the same fractional transmittance T;    -   each filter has a different fractional transmittance T.

According to the present disclosure, this object is achieved with theinitially-defined avalanche photodiode in that the isolation trenchincludes an encasement made of a dielectric material and a metallic coresurrounded by the dielectric encasement, and in that the thickness ofthe isolation trench is larger than or equal to 9/10 of the thickness ofthe second well-shaped semiconductor layer, the isolation trench thusforming a deep trench isolation within the second well-shapedsemiconductor layer.

By substantially increasing the depth of the isolation trench andfitting the trench with a metallic core, the confinement of the electricfield to the avalanche region is improved. At the same time, thedielectric encasement of the deep trench acts as a shield againstelectrical crosstalk, while the metallic core acts as a shield againstoptical crosstalk.

The deep isolation trench of the present disclosure doubles as acrosstalk reducing and as an edge breakdown prevention structure, thussaving space and reducing complexity.

According to embodiments, the avalanche photodiode of the presentdisclosure may include one, several or all of the following features, inall technically possible combinations:

-   -   the photodiode is of the Silicon On Insulator (SOI) type;    -   the isolation trench is in direct lateral contact with the outer        boundary of the first shallow semiconductor layer;    -   the photodiode lacks any edge breakdown preventing semiconductor        guard ring;    -   the metallic core includes at least one, and in particular three        plate-shaped metallic elements;    -   the main longitudinal axis of each plate-shaped metallic element        extends along the main direction of light entry into the        photodiode;    -   the metallic core includes at least two plate-shaped metallic        elements, and the plate-shaped metallic elements are arranged        concentrically within the dielectric encasement;    -   the metallic core includes at least two plate-shaped metallic        elements, and each plate-shaped metallic element is spaced apart        from its neighbouring plate-shaped metallic elements;    -   the space between the plate-shaped metallic elements is taken up        by the dielectric material of the dielectric encasement;    -   the metallic core is made of tungsten, nickel, or titanium or a        silicide of tungsten, nickel or titanium;    -   the dielectric encasement is made of silicon dioxide;    -   at least ⅖ of the width of the isolation trench are taken up by        the dielectric encasement;    -   an additional outer dielectric isolation trench, which is        located on the photodiode's outer edge;    -   the thickness of the outer isolation trench is equal to the        thickness of the second well-shaped semiconductor layer;    -   the metallic core is electrically insulated from the rest of the        photodiode;    -   the photodiode is of the backside-illuminated type;    -   an enrichment layer embedded in the first shallow extrinsic        semiconductor layer;    -   the outer periphery of the enrichment layer radially touches the        inner periphery of the dielectric encasement of the dielectric        isolation trench;    -   the thickness of the enrichment layer is the same as the        thickness of the first shallow extrinsic semiconductor layer.

The present disclosure also pertains to a method of manufacturing aphotodiode as defined above.

The present disclosure also relates to an optical sensor comprising anintegrated assembly of a photodiode as defined above and an IC chipincluding electronic circuitry for the control and readout of thephotodiode.

The present disclosure also relates to an optical detector, such as asilicon photomultiplier, including an array of photodiodes as definedabove.

BRIEF DESCRIPTION OF THE DRAWINGS

Various embodiments of the present disclosure will now be described inmore detail, with reference to the accompanying drawings, in which:

FIG. 1 is a cross-sectional view of a first embodiment of aphotodetecting optoelectronic component according to the presentdisclosure;

FIG. 2 is a block diagram illustrating the signal processing andautomatic operating parameter adjustment performed by the photodetectingoptoelectronic component of FIG. 1 ; and

FIGS. 3A-3C show a second, third and fourth embodiment, respectively, ofa photodetecting optoelectronic component of the present disclosure.

FIG. 4 is a schematic cross-section of a first embodiment of asemiconductor avalanche photodiode according to the present disclosure;

FIG. 5 is a variant of the semiconductor avalanche photodiode of FIG. 4with some added features;

FIG. 6 is a schematic cross-section of a second embodiment of asemiconductor avalanche photodiode according to the present disclosure;

FIG. 7 illustrates the process steps of fabricating the deep trenchisolation with vertical floating field plates according to the presentdisclosure; and

FIG. 8 is a schematic cross-section of an optical sensor with anintegrated avalanche photodiode and IC chip according to the presentdisclosure.

DETAILED DESCRIPTION

FIG. 1 shows a first embodiment 100 of an integrated photodetectingoptoelectronic semiconductor component of the present disclosure. Thecomponent 100 is a self-contained optical detector. It is a small unit,typically on the millimetre scale, which can be built into variouselectronic equipment, such as a smart phone, a wearable, or a virtualreality headset, to act as a light sensor.

The photodetector 100 of FIG. 1 is particularly suitable forapplications requiring detection under bright ambient light conditions.It is also well adapted to light detection applications in environmentswhich are characterised by substantial and varying amounts of backgroundlight.

The photodetector 100 of FIG. 1 can for example be used as an infraredlight sensor for eye tracking in virtual reality glasses.

With reference to FIG. 1 , the photodetecting optoelectronic component100 includes a SPAD-based main detection device 102 with a main SPAD 120a, a SPAD-based reference detection device 104 with a reference SPAD 120b, a neutral density filtering device 106 and a microcontroller 108.

The main detection device 102 is located in a first half 110 of asemiconductor package 112, while the reference detection device 104 islocated in a second half 114 of the semiconductor package 112.Accordingly, the reference detection device 104 is arranged proximate tothe main detection device 102. The main detection device 102, as well asthe reference detection device 104 are both identified by a respectivedashed polygon in FIG. 1 .

The main detection device 102 and the reference detection device 104 arelocated in a side-by-side relationship to each other. Furthermore, inthe present example, the main detection device 102 and the referencedetection device 104 merge into one another. In other words, they aredifferent sections of an integral monolithic block B. The block B has afront side 116, which is the area of entry for light L that is to bedetected by the optoelectronic component 100. A back side 118 of theblock B is located opposite to the light entry side 116.

The neutral density filtering device 106 is arranged on top of thereference detection device 104. The main detection device 102 is free ofany neutral density filtering device.

The neutral density filtering device 106 may take the form of a singlematerial layer. In the embodiment of FIG. 1 , there is one sheet-likeneutral density filter 106 on the front side 116 of the optoelectroniccomponent 100. Neutral density filter 106 attenuates the intensity ofall wavelengths of light equally. Hence, the intensity of light exitingthe neutral density filter 106 is lower compared to the intensity oflight entering the neutral density filter 106. Accordingly, because ofthe presence of the neutral density filter 106 in front of the referencedetection device 104, the intensity of the light reaching the referenceSPAD 120 b is substantially lower than the intensity of the lightreaching the main SPAD 120 a.

The neutral density filter 106 is chosen to have specific opticalproperties. In particular, the neutral density filter 106 has a specificfractional transmittance T. The fractional transmittance T of theneutral density filter 106 may range from 10⁻⁸ to 0.9, depending on therequirements that must be fulfilled by the optoelectronic component 100.

The microcontroller 108 is embedded in the monolithic block B, and inparticular in the semiconductor package 112.

Both the main detection device 102 and the reference detection device104 comprise the following elements:

-   -   One single-photon avalanche diode or SPAD 120 a, 120 b to detect        incoming photons;    -   A recess 122 a, 122 b, the respective SPAD 120 a, 120 b being        arranged at the bottom of the recess; and    -   readout electronics 124 a, 124 b for processing the SPAD signal        delivered by the respective SPAD 120 a, 120 b.

Both recesses 122 a and 122 b are open cavities, which are defined inthe bulk of the semiconductor package 112.

In the present embodiment, readout electronics 124 a and 124 b areembedded in the semiconductor package 112. Each readout electronics 124a, 124 b may be arranged below its corresponding SPAD 120 a, 120 b.

The main SPAD 120 a of the main detection device 102 and the referenceSPAD 120 b of the reference detection device 104 are identical. Thismeans that they are of the same type and thus have the same structure.For example, both SPADs 120 a and 120 b may have been fabricated withthe same manufacturing process. Accordingly, the main detection device102 and the reference detection device 104 have the same electro-opticalbehaviour.

Furthermore, each detection device 102 and 104 also includes aprotective cover device 126 a and 126 b. The two protective coverdevices 126 a, 126 b are part of an overall cover layer C. The coverlayer C extends over the entire top side 116. The cover layer C may becompletely transparent to light radiation L across the entire lightspectrum covered by the optical detector 100. Alternatively, theprotective layer C may act as an optical filter, e.g., a bandpass,shortpass or longpass filter.

Both detection devices 102 and 104 also have a light inlet 128 a and 128b. Each light inlet 128 a, 128 b corresponds to the section of theprotective cover device 126 a, 126 b, which seals the top of therespective recess 122 a, 122 b.

The neutral density filter 106 covers the light inlet 128 b of thereference detection device 104.

FIG. 2 is a block diagram illustrating the signal processing and SPADcontrol carried out by the optoelectronic component 100. One candistinguish the main SPAD 120 a and the reference SPAD 120 b, a readoutelectronics 124, and the microcontroller 108. The neutral density filter106 that attenuates the light L before it reaches the reference SPAD 120b is also shown. Each SPAD 120 a and 120 b has a power supply 130 a and130 b. The power supply 130 a, 130 b sets the reverse-bias voltageapplied to its respective SPAD 120 a, 120 b.

In the example shown in FIG. 2 , both SPADs 120 a, 120 b share the samereadout electronics 124. This means that one and the same readoutelectronics sequentially processes first the signal from one of the twoSPADs and then the signal from the other SPAD. Alternatively, each SPAD120 a, 120 b may have its own dedicated readout chain. In this case, onemay then have two parallel identical readout chains 124 a and 124 b (cf.FIG. 1 ). This allows a simultaneous readout of the signals of bothSPADs.

FIG. 2 shows the readout electronics 124 as including three consecutivestages, namely a filter and amplification stage 132, followed by acomparator or discriminator stage 134, followed by an analogue todigital converter (ADC) or counter 136. The filter and amplificationstage 132 is optional. It may be left out since SPADs already have abuilt-in intrinsic signal gain.

The readout chain 124 has a signal input section I and a signal outputsection O. The signal input section I receives a signal from one of thetwo SPADs 120 a, 120 b. This signal is then processed by the threestages 132, 134 and 136 of the readout electronics 124. The result is adetection signal Sr or So at the signal output section O.

The combination of the main SPAD 120 a and the readout electronics 124acts as the main detection device 102 and delivers an output signal Sothat is indicative of the intensity of light L which irradiates theoptoelectronic component 100. The combination of the reference SPAD 120b and the readout electronics 124 acts as the reference detection device104 and delivers a reference signal Sr. Both the reference signal Sr andthe output signal So are provided to the microcontroller unit 108 forfurther processing.

The microcontroller unit 108 is adapted to control the power supplies130 a, 130 b of the two SPADs 120 a, 120 b. In particular, themicrocontroller unit 108 can control the two power supplies 130 a, 130 bto modify the magnitude of the reverse-bias voltage applied to each SPAD120 a, 120 b.

We will now describe the control process carried out by themicrocontroller 108. This control process is an automatic SPADsaturation assessment and correction, which ensures that thephotodetector 100 always operates in its linear detection range. Thecontrol process may be re-iterative, meaning that it may be carried outregularly in a cycling manner.

The control process starts with both the reference SPAD 120 b and themain SPAD 120 a being biased at the same reverse voltage. The intensityof light L stemming from a light source Q is measured by both the maindetection device 102 and the reference detection device 104. Theresulting signals So (output signal from the main detection device 102)and Sr (reference signal from the reference detection device 104) areboth fed into the microcontroller 108. The microcontroller 108 thendetermines a nominal output signal Sn based on the reference signal Srand the fractional transmittance T of the neutral density filter 106.More specifically, the controller 108 calculates the nominal outputsignal Sn using the following formula:

Sn=Sr/T.

Then, the controller 108 compares the calculated nominal output signalSn with the output signal So delivered by the main detection device 102.

If the output signal So is smaller than the nominal output signal Sn,the controller concludes that the main SPAD 120 a is operating undersaturation conditions. In this case, the microcontroller 108 lowers thereverse-bias voltage of both SPADs 120 a and 120 b to bring the mainSPAD 120 a out of saturation.

The reverse-bias voltage may be lowered in specific increments (e.g. inincrements of 1 V) until the nominal output signal Sn is equal to theoutput signal So.

When both signals Sn and So are equal, the controller 108 concludes thatthe main SPAD 120 a now operates in its linear detection range. Thecorresponding output signal So is the signal provided by theoptoelectronic component 100 as an accurate indication of the intensityof the light which irradiates the component.

As already mentioned, the control process may be repeated on a regularbasis. This allows real-time monitoring of intensity variations in thelight L coming from the light source Q and, if needed, a correspondingreal-time SPAD saturation correction in the optoelectronic component100.

With reference to FIGS. 3A-3C, we will now describe three furtherembodiments of the optoelectronic component of the present disclosure.The three embodiments shown in FIGS. 3A-3C are all based on a wholearray A of single photon avalanche diodes (SPADs). This is in contrastto the embodiment of FIG. 1 , which uses two single SPADs. In essence,in the embodiments of FIGS. 3A-3C, the two single SPADs of the firstembodiment are each replaced by a whole set of SPADs. The different SPADsets together form a complete SPAD array A, such as a siliconphotomultiplier (SiPM).

In the second embodiment 200 shown in FIG. 3A, the SPAD array A issubdivided into a first portion 202 and a second remaining portion 204.The first portion 202 corresponds to the main detection device, and theremaining portion 204 corresponds to the reference detection device. Thesignal delivered by the main SPAD set 202 is read out via a main outputcontact Z1. The signal delivered by the reference SPAD set 204 is readout via a reference output contact Z2. In this embodiment, the neutraldensity filtering device consists of a single neutral density filter206, which covers the reference portion 204 of the SPAD array A. Bothcontacts Z1 and Z2 are connected to readout electronics, as shown inFIG. 2 . Based on the signal provided by the contact Z1, the readoutelectronics generates the output signal So. Based on the signal providedby the reference contact Z2, the readout electronics generates thereference signal Sr. The same control process as described above is thencarried out to ensure that the main SPAD set 202 always operates in thelinear detection range, below saturation.

In the third embodiment 250 shown in FIG. 3B, the main detection devicecomprises two sub-portions 202.1 and 202.2 of the SPAD array A, whichtogether form the overall main detection portion. Likewise, thereference detection device comprises two other sub-portions 204.1 and204.2 of the SPAD array A, which together form the overall referencedetection portion. Here, the neutral density filtering device consistsof two separate neutral density filters 206.1 and 206.2, which cover thereference sub-portion 204.1 and 204.2, respectively. Both neutraldensity filters 206.1 and 206.2 have the same fractional transmittanceT. Each reference sub-portion 204.1 and 204.2 of the reference detectiondevice has its own output contact Z2 and Z3. The two signals stemmingfrom these two different contacts Z2 and Z3 may be averaged orconsidered separately. This kind of setup may be advantageous inapplications with a non-uniform optical flux.

In the fourth embodiment 280 shown in FIG. 3C, the SPAD array A isdivided into four quadrants, each with its own output contact Z1 to Z4.One of the quadrants, labelled 202, corresponds to the main detectiondevice, and is free of any neutral density filter. The three otherquadrants 204.1, 204.2 and 204.3 correspond to the reference detectiondevice. The three quadrants for reference detection are each covered bya separate neutral density filter 206.1, 206.2 and 206.3. Each filter206.1, 206.2 and 206.3 has a different fractional transmittance T. Thefractional transmittance T may decrease from one filter to the next. Thesignals produced by the three filter-covered quadrants 204.1, 204.2 and204.3 can be read individually and the control process described abovecan be extended to all the collected signals. This allows a moreaccurate estimate of the saturation state in a wider set of applicationconditions.

In all three embodiments shown in FIGS. 3A-3C, besides the outputcontacts Z1, Z2, etc., the SPAD array A also has an additional commoncontact (not shown), which is shared by all portions or quadrants. Thiscommon contact may be located on the backside of the SPAD array A.

Summarising, the SPAD-based photodetecting optoelectronic components ofthe present disclosure include a simple, cost-effective, compact andfast solution for the online monitoring, assessment and potentialcorrection of SPAD saturation. The present solution is compatible withstandard CMOS technology. Furthermore, with the present solution, SPADdetectors can be used in a wider range of applications (especially inthe consumer area), even for high impinging photon fluxes. The solutionis also compatible with all the state-of-the-art SPAD quenchingmechanisms.

The present disclosure further relates to improvements in avalanchephotodiodes, and in particular in single photon avalanche diodes, orSPADs, which are also known as Geiger mode avalanche photodiodes.

Thanks to their high sensitivity, very fast timing response and largeintrinsic gain, the SPADs of the present disclosure can be used in a lotof different applications, such as time-of-flight measurements, LiDAR,user detection, optical recognition, heart rate monitoring, orfunctional near-infrared spectroscopy, to name a few.

The SPADs of the present disclosure may also be arranged in arrays touse them for larger imaging applications. A silicon photomultiplier is atypical example of an optical detector that may be constructed with thepresent SPADs. Using the SPADs of the present disclosure leads todetector arrays having a high fill factor and a high pixel density. Thisreduces the detector's size and enables much better photon statisticsand high quality imaging. This is due to the fact that the SPADs of thepresent disclosure are backside-illuminated SPADs. In this type ofSPADs, the light to be detected enters the photodiode from its backinstead of its front.

The backside-illuminated SPADs of the present disclosure may befabricated using silicon on insulator (SOI) technology, and optionallycompatible with complementary metal oxide semiconductor (CMOS)technology.

Turning now to FIG. 4 , we will describe a first embodiment of a singlephoton avalanche diode 100 according to the present disclosure. The SPADstructure 100 shown in FIG. 4 includes, from the bottom B to the top T,a handling layer 102, a bottom oxide layer 104, a PN junction 106, afield oxide layer 108, a cathode contact 110 and an anode contact 112.

The handling layer 102 is typically a semiconductor layer, e.g. ann-type layer. Strictly speaking, this n-type layer 102 is not part ofthe final avalanche photodiode 100. It is part of a handling wafer usedduring the manufacturing process and is removed during a wafer backsideetching process.

The SPAD 100 shown in FIG. 4 is manufactured in SOI technology, whereinthe bottom oxide layer 104 corresponds to the insulator, and the PNjunction 106 to the semiconductor on the insulator.

In the present example, the PN junction 106 takes the form of a firstshallow extrinsic semiconductor layer 114 with a first type of doping,which is embedded in a second well-shaped extrinsic semiconductor layer116 with a second type of doping opposite to the first type of doping.

In the present example, the first shallow semiconductor layer 114 is ap+-type layer. Accordingly, the second well-shaped semiconductor layer116 is an n-type layer. The PN junction 106 is thus made of a lowerlayer 116 and an upper layer 114. The thickness of the secondwell-shaped semiconductor layer 116 is referenced with the letter D. Atypical range for D is 2 to 10 μm. Compared thereto, the p+-type layer114 is much thinner and has a thickness of e.g. between 0.1 and 1 μm.Hence, the thickness of the shallow semiconductor layer 114 is typicallybetween 5 to 10% of the thickness of the well-shaped semiconductor layer116.

The well-shaped second semiconductor layer 116 can be subdivided, in thetransverse direction Q, into a central light absorption region 118, anintermediate isolation region 120, and an outer contacting region 122.The shallow semiconductor layer 114 sits on top of the central lightabsorption region 118. The shallow semiconductor layer 114 is in directcontact with the underlying absorption region 118 of the well-shapedsemiconductor layer 116. The intermediate isolation region 120 has adielectric isolation trench 124 integrated therein. The outer contactingregion 122 is provided with a local enrichment area 126, which, in thepresent example, is of the n+-type. The local enrichment area 126guarantees a good electrical contact for the cathode 110.

The SPAD 100 can also be described as including a multiple-layer stackwith a bottom insulating layer 104, an adjacent intermediatesemiconductor layer 106 (which corresponds to the PN junction), and atop insulating layer 108. The semiconductor layer 106 is thus sandwichedbetween the two insulating layers 104 and 108.

The cathode contact 110, as well as the anode contact 112 are bothimplemented as discontinuities in the top field oxide/insulating layer108. In the present embodiment, the cathode contact 110 and the anodecontact 112 are concentrically arranged. The cathode contact 110surrounds the anode contact 112 in the same way as the outer contactingregion 122 of the well-shaped layer 116 surrounds the shallow layer 114.

The semiconductor avalanche photodiode 100 also comprises an avalancheregion A at the interface between the two semiconductor layers 114 and116 (cf. the dashed rectangle in FIG. 4 ). When the SPAD 100 is biasedat an operating voltage above its breakdown voltage, the avalancheregion A is adapted to undergo avalanche breakdown when triggered byphotons M, which have entered the SPAD 100 from the bottom side B. Theavalanche region A is electrically confined by the isolation trench 124.

The dielectric isolation trench 124 extends into the second well-shapedsemiconductor layer 116. It surrounds the entire outer periphery of theavalanche region A to prevent premature edge breakdown in the SPAD 100.The isolation trench 124 may have a closed circular or polygonal shapewhen seen from the top T of the SPAD 100. The depth or thickness X ofthe isolation trench 124 is defined as the distance from the uppersurface 128 of the well-shaped layer 116 to the lower base 130 of theisolation trench 124. The isolation trench 124 is a so-called deepisolation trench. This means that the isolation trench 124 extendsdeeply into the well-shaped layer 116. According to the presentdisclosure, the thickness X of the isolation trench 124 is larger thanor equal to 9/10 of the thickness D of the second well-shapedsemiconductor layer 116. This minimum thickness of the deep isolationtrench 124 in relation to the well 116 ensures an adequate confinementof the avalanche region A to the active area of the SPAD 100. This hasbeen confirmed by numerical simulations. The deep isolation trench 124is an effective edge breakdown preventing device.

One will note that the deep isolation trench 124 is arranged in-betweenthe outer cathode contact 110 and the inner anode contact 112. Hence,when starting from the centre of the SPAD 100, and moving outwardsradially therefrom, one will first encounter the anode contact 112, thenthe deep isolation trench 124, and finally the outer cathode contact110.

As apparent from FIG. 4 , the width W of the deep isolation trench 124is smaller than its thickness X. The width of the deep isolation trench124 can be of the order of 0.5 μm.

One will note that the deep isolation trench 124 is in direct lateralcontact with the outer boundary 136 of the first shallow semiconductorlayer 114.

According to the present disclosure, the isolation trench 124 includesan encasement 132, made of a dielectric material, and a metallic core134, surrounded by the dielectric encasement 132. The encasement 132 maye.g. be made of a semiconductor oxide such as silicon dioxide. Themetallic core 134 may for example be made of tungsten.

In the present example, the metallic core consists of a plate-shapedmetallic element 134. The main longitudinal axis L of the plate-shapedmetallic element 134 extends along the main direction M of light entryinto the SPAD 100 (cf. the arrows). The metallic core 134 can also bequalified as a field plate since it confines the electrical field in thePN junction 106. This barrier field plate 134 is electrically insulatedfrom the rest of the SPAD 100. The electrical insulation is provided bythe dielectric encasement 132 and the field oxide layer 108. Since thefield plate 134 is electrically insulated, it is not connected to anyreference voltage and thus a floating field plate.

It will be noted that the upper edge 135 of the metal plate 134 mayprotrude out of the encasement 132 and into the top field oxide layer108.

At least ⅖ of the width W of the deep isolation trench 124 may be takenup by the dielectric encasement 132.

One particular advantage of the SPAD 100 shown in FIG. 4 is that it doesnot need any edge breakdown preventing semiconductor guard ring as inthe prior art. According to the present disclosure, edge breakdown isprevented thanks to the substantial depth of the isolation trench 124 incombination with the metallic core 134.

On top of that, the metallic core 134 acts as an optical barrier forsecondary photons P emitted in the PN junction 106. Those parasiticsecondary photons P are an unwanted side-effect that occurs during theoperation of the SPAD 100. Electroluminescence in the PN junction 106generates photons, which may propagate through the SPAD 100 into thesurroundings (so-called optical crosstalk). This is prevented by themetal barrier field plate 134.

Furthermore, the dielectric encasement 132 acts as an electricalbarrier, which prevents electric charge carriers from propagating intothe SPAD's surroundings (so-called electrical crosstalk).

FIG. 5 shows a variant of the first embodiment of FIG. 4 . Compared tothe embodiment of FIG. 4 , the SPAD structure 200 of FIG. 5 has twoadditional features: a p+-type enrichment layer 238 and an additionalouter dielectric isolation trench 240.

The p+-type enrichment layer 238 is embedded in the shallowsemiconductor layer 214. This p+-type enrichment layer 238 guarantees agood electrical contact between the anode contact 212 and the shallowp+-type semiconductor layer 214. In an embodiment, th outer periphery ofthe p+-type enrichment layer 238 radially touches the inner periphery ofthe dielectric encasement 232 of the inner dielectric isolation trench224. As a variant not shown in FIG. 5 , the thickness of the p+-typeenrichment layer 238 may be the same as the thickness of the shallowlayer 214. This may reduce possible charging effects at the p-n junction206, which can be due to the fixed charge in the encasement 232.

This optional p+-type enrichment layer 238 on the upper periphery of theshallow semiconductor layer 214 is advantageous in consideration of thetypically high n-type doping of the well-shaped epitaxial layer 216.

The outer dielectric isolation trench 240 is located on the SPAD's outerlateral edge. It surrounds the extrinsic semiconductor well 216 of thePN junction 206. The additional outer dielectric isolation trench 240 issandwiched between the bottom oxide layer 204 and the top field oxidelayer 208.

In an embodiment, as shown in FIG. 5 , the thickness of the outerisolation trench 240 is equal to the thickness D of the secondwell-shaped semiconductor layer 216. The additional outer dielectricisolation trench 240 ensures a full electrical decoupling from adjacentpixels when the SPAD structure 200 is used in a SPAD array.

We will now turn to FIG. 6 , which shows a second embodiment 300 of aSPAD structure of the present disclosure. The only difference withrespect to the first embodiment is the presence of more than oneplate-shaped metallic element in the dielectric encasement 332. In theembodiment shown in FIG. 6 , the encasement 332 contains threeplate-shaped metallic elements 334 a, 334 b and 334 c. In the presentexample, the three barrier plates 334 a to c are arranged concentricallywithin the dielectric encasement 332. The three metallic plates 334 a toc are spaced apart from each other. The space S between the metallicplates 334 a to c is taken up by the dielectric material of thedielectric encasement 332. Accordingly, the three barrier plates 334 ato c are encapsulated in a dielectric sheathing. This sheathing mayexclusively consist of the encasement 332. Alternatively, and as shownin FIG. 6 , the sheathing may consist of a combination of the encasement332 and a section of the top field oxide layer 308.

FIG. 7 shows the process steps that may be carried out during themanufacture of the SPAD 300 of FIG. 6 in order to fabricate the deepisolation trench 324. FIG. 7 shows a total of six process steps.

In step 1, a section E of the field oxide layer 308 is removed in orderto lay bare a region of the well 316. This is done by photoresistdeposition, followed by a photomask process, followed by a dry etch ofthe field oxide layer 308 and finally a removal of the photoresist.

Step 2 is a dry etching of the well 316. This creates a void V in thewell 316 for the isolation trench 324. In this step, the field oxidelayer 308 acts as a hard mask.

In step 3, semiconductor oxide is thermally grown inside the void Vuntil the void V is completely filled by an oxide layer OX.Alternatively, this filling of the void V may be done by deposition.This third step terminates when the void filling oxide layer OX is flushwith the field oxide layer 308.

In step 4, three cavities C1, C2 and C3 are etched into the oxide layerOX. This is done by deposition of a photoresist, followed by a photomaskprocess, followed by dry etching, and finally by the removal of thephotoresist.

In step 5, a metal such as tungsten is deposited inside each of thecavities C1, C2 and C3. The metal deposition ends when the top end ofeach of three metal layers is flush with the top surface of the fieldoxide layer 308. The result is the three field plates 334 a to 334 c.This step involves the deposition of a temporary metal barrier (e.g.,made of titanium or titanium nitride) to shield the upper surface of thephotodiode 300 except the three cavities C1, C2 and C3, followed by thetungsten deposition to fill the cavities C1, C2 and C3, followed by anetchback of the excess tungsten, and finally the etchback of thetemporary metal barrier.

The last step (step 6) consists of the deposition of supplementarysemiconductor oxide to planarise the top surface of the SPAD 300 and tofully encase the metal core 334 of the isolation trench 324.

FIG. 8 shows how the SPAD 300 of FIG. 6 may be integrated with an ICchip 400 to form an optical sensor 500. The optical sensor 500 shown inFIG. 8 is a fully integrated solution of an SOI SPAD with CMOSelectronics, which is suitable for high quality 3D imaging. FIG. 8 showsthe optical sensor 500 as part of two mutually bonded semiconductorwafers W1 and W2. The upper semiconductor wafer W1 contains an array ofidentical SPADs 300. Each SPAD 300 of the array represents one pixel ofa whole optical detector. The next cell or pixel of the SPAD array andthe corresponding CMOS electronics are represented by the dashed lineson the right hand side of FIG. 8 .

The bonding between the two wafers W1 and W2 is implemented via metalcontacts 502 and interlayers 504. One can also distinguish metalinterconnects 506 in the upper wafer W1. Illustrated as well arecontacts and vias 508 and a deposited oxide layer 510.

There is a vias section 512 next to the SPAD 300. The vias section 512includes the electrical lines, which are necessary for the power supplyof and signal exchange with the IC chip 400.

The lower part 402 of the IC chip 400 includes the pixel electronics,and the upper part 404 includes multiple vias and interconnects 406,which are embedded in an oxide layer 408.

As illustrated by the wavy arrows, the optical sensor 500 is of thebackside illuminated type. This means that the light to be detectedenters the SPAD 300 from the back. The front side of the SPAD 300 isused for the integration with the IC chip 400, which includes thenecessary readout electronics 402. Accordingly, the front side of eachSPAD 300 is occluded by the associated IC chip 400.

Summarising, the SPAD structures described in the present disclosurehave an innovative deep trench isolation for the prevention of edgebreakdown, and at the same time, reduction of crosstalk and darkcurrent, when the SPAD structures are used in a SPAD array.

In other words, in the SPAD structures of the present disclosure, thedeep trench fulfils two different roles at the same time: on the onehand it prevents electrical and optical crosstalk, and on the other handit prevents edge breakdown. In this way, the SPAD does not need twoseparate elements to achieve both effects, which increases the fillfactor.

The disclosed SPAD structures can be used to fabricate high-densityback-illuminated SPAD arrays, which can operate even at high overvoltagevalues. The resulting SPAD arrays have a high photodetection efficiencythroughout the whole light spectrum, i.e. from blue to near infrared,low crosstalk and dark current and a high spatial resolution. They alsohave a high fill factor and an excellent electro-optical decouplingbetween pixels.

The present semiconductor on insulator back-illuminated SPAD design isfully compatible with CMOS technology. The resulting SPAD arraydetectors are suitable for high quality 3D imaging such as needed intime-of-flight applications (e.g. optical proximity sensing, LiDAR,etc.). Furthermore, the resulting SPAD array detectors can operate evenunder very low light conditions.

1. An integrated photodetecting optoelectronic semiconductor componentconfigured to deliver an output signal So indicative of an intensity oflight irradiating the component; wherein the component comprises: aSPAD-based main detection device configured to detect incoming photonsand to deliver the output signal So based on the detected photons; aSPAD-based reference detection device proximate to the main detectiondevice; wherein the SPAD-based reference detection device has the sameelectro-optical behaviour as the main detection device; wherein theSPAD-based reference detection device is configured to detect incomingphotons and to deliver at least one reference signal Sr based on thedetected photons; and wherein the SPAD-based reference detection devicehas a light inlet for incoming photons; a neutral density filteringdevice covering the light inlet of the reference detection device; and acontroller configured to: determine a nominal output signal Sn based onthe at least one reference signal Sr delivered by the referencedetection device and on a known optical property of the neutral densityfiltering device; compare the nominal output signal Sn with the outputsignal So delivered by the main detection device; adjust at least oneoperating parameter of the main detection device and of the referencedetection device when the output signal So is different from the nominaloutput signal Sn; and reduce the magnitude of the reverse-bias voltageapplied to each SPAD of the main detection device and of the referencedetection device.
 2. The component of claim 1, wherein the controller isconfigured to adjust the at least one operating parameter when theoutput signal So is less than the nominal output signal Sn. 3.(canceled)
 4. The component of claim 1, wherein the same electro-opticalbehaviour in the main detection device and the reference detectiondevice is achieved in that the same SPAD structure is implemented inboth devices.
 5. The component of claim 1, wherein in the known opticalproperty is the fractional transmittance T of the neutral densityfiltering device.
 6. The component of claim 5, wherein the referencedetection device is configured to deliver a single reference signal Sr,wherein the neutral density filtering device consists of a singleneutral density filter, and wherein the controller is configured todetermine the nominal output signal Sn using the following formula:Sn=Sr/T.
 7. The component of claim 1, wherein both the main detectiondevice and the reference detection device each comprise the followingelements: a single SPAD configured to detect incoming photons; a recess,the SPAD being arranged at the bottom of the recess; and readoutelectronics configured to process the SPAD signal delivered by the SPAD.8. The component of claim 1, wherein both the main detection device andthe reference detection device are integrated into a singlesemiconductor package.
 9. The component of claim 1, wherein thecomponent includes further comprising a SPAD array, and wherein a firstportion of the SPAD array is part of the main detection device, and theremaining portion of the SPAD array is part of the reference detectiondevice.
 10. The component of claim 9, wherein the neutral densityfiltering device consists of a single neutral density filter coveringthe remaining portion of the SPAD array.
 11. The component of claim 9,wherein the neutral density filtering device consists of at least twoseparate neutral density filters covering the remaining portion of theSPAD array.
 12. The component of claim 11, wherein the filters have thesame fractional transmittance.
 13. The component of claim 11, whereineach filter has a different fractional transmittance.
 14. Asemiconductor avalanche photodiode for light detection, the avalanchephotodiode comprising: a p-n junction comprising a first shallowextrinsic semiconductor layer with a first type of doping, embedded in asecond well-shaped extrinsic semiconductor layer with a second type ofdoping opposite to the first type of doping; a first electric contactconfigured to electrically connect the first semiconductor layer; asecond electric contact configured to electrically connect the secondsemiconductor layer; an avalanche region at the interface between thetwo semiconductor layers configured to undergo avalanche breakdown whentriggered by the light to be detected; and a dielectric isolation trenchextending into the second well-shaped semiconductor layer andsurrounding the outer periphery of the avalanche region to preventpremature edge breakdown in the avalanche photodiode; wherein theisolation trench is arranged, in the radial direction, in-between thefirst electric contact and the second electric contact; wherein: theisolation trench comprises an encasement made of a dielectric materialand a metallic core surrounded by the dielectric encasement; and thethickness of the isolation trench is greater than or equal to 90% of thethickness of the second well-shaped semiconductor layer, the isolationtrench thus forming a deep trench isolation within the secondwell-shaped semiconductor layer.
 15. The photodiode of claim 14, whereinthe photodiode is of the Silicon On Insulator type.
 16. The photodiodeof claim 14, wherein the isolation trench is in direct lateral contactwith the outer boundary of the first shallow semiconductor layer. 17.The photodiode of claim 14, wherein the photodiode lacks any edgebreakdown preventing semiconductor guard ring.
 18. The photodiode ofclaim 14, wherein the metallic core comprises at least one plate-shapedmetallic element.
 19. The photodiode of claim 18, wherein the mainlongitudinal axis of the at least one plate-shaped metallic elementextends along the main direction of light entry into the photodiode. 20.The photodiode of claim 18, wherein the metallic core comprises at leasttwo plate-shaped metallic elements, and wherein the plate-shapedmetallic elements are arranged concentrically within the dielectricencasement.
 21. The photodiode of claim 18, wherein the metallic corecomprises at least two plate-shaped metallic elements, and wherein eachplate-shaped metallic element is spaced apart from its neighbouringplate-shaped metallic elements.
 22. (canceled)
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